<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
	<id>https://aznot.com/index.php?action=history&amp;feed=atom&amp;title=Synopsys</id>
	<title>Synopsys - Revision history</title>
	<link rel="self" type="application/atom+xml" href="https://aznot.com/index.php?action=history&amp;feed=atom&amp;title=Synopsys"/>
	<link rel="alternate" type="text/html" href="https://aznot.com/index.php?title=Synopsys&amp;action=history"/>
	<updated>2026-05-02T20:01:07Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
	<generator>MediaWiki 1.41.0</generator>
	<entry>
		<id>https://aznot.com/index.php?title=Synopsys&amp;diff=9038&amp;oldid=prev</id>
		<title>Kenneth: /* Synopsys ARC-V */</title>
		<link rel="alternate" type="text/html" href="https://aznot.com/index.php?title=Synopsys&amp;diff=9038&amp;oldid=prev"/>
		<updated>2025-10-13T15:56:37Z</updated>

		<summary type="html">&lt;p&gt;&lt;span dir=&quot;auto&quot;&gt;&lt;span class=&quot;autocomment&quot;&gt;Synopsys ARC-V&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 15:56, 13 October 2025&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l9&quot;&gt;Line 9:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 9:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  Synopsys Moves To RISC-V To Help SoC Developers&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  Synopsys Moves To RISC-V To Help SoC Developers&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-side-deleted&quot;&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-side-deleted&quot;&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt; Synopsys Expands Its ARC Processor IP Portfolio with New RISC-V Family&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-side-deleted&quot;&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt; https://news.synopsys.com/2023-11-07-Synopsys-Expands-Its-ARC-Processor-IP-Portfolio-with-New-RISC-V-Family&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Expansion or ARC EOL ===&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Expansion or ARC EOL ===&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key aznot:diff:1.41:old-9037:rev-9038:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Kenneth</name></author>
	</entry>
	<entry>
		<id>https://aznot.com/index.php?title=Synopsys&amp;diff=9037&amp;oldid=prev</id>
		<title>Kenneth: /* Expansion or EOL */</title>
		<link rel="alternate" type="text/html" href="https://aznot.com/index.php?title=Synopsys&amp;diff=9037&amp;oldid=prev"/>
		<updated>2025-10-13T15:55:03Z</updated>

		<summary type="html">&lt;p&gt;&lt;span dir=&quot;auto&quot;&gt;&lt;span class=&quot;autocomment&quot;&gt;Expansion or EOL&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 15:55, 13 October 2025&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l10&quot;&gt;Line 10:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 10:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Expansion or EOL ===&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Expansion or &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;ARC &lt;/ins&gt;EOL ===&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&amp;lt;blockquote&amp;gt;&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&amp;lt;blockquote&amp;gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key aznot:diff:1.41:old-9036:rev-9037:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Kenneth</name></author>
	</entry>
	<entry>
		<id>https://aznot.com/index.php?title=Synopsys&amp;diff=9036&amp;oldid=prev</id>
		<title>Kenneth: Created page with &quot;== Synopsys ARC-V ==   ARC-V Processor IP | Synopsys  https://www.synopsys.com/designware-ip/processor-solutions/arc-v-processors.html   Enhancing RISC-V Design w/ ARC Processor IP | Synopsys Blog  https://www.synopsys.com/blogs/chip-design/arc-processor-ip-risc-v.html   Synopsys Moves To RISC-V To Help SoC Developers  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/  === Expansion or EOL ===  &lt;blockquote&gt; &quot;A familiar fr...&quot;</title>
		<link rel="alternate" type="text/html" href="https://aznot.com/index.php?title=Synopsys&amp;diff=9036&amp;oldid=prev"/>
		<updated>2025-10-13T15:54:25Z</updated>

		<summary type="html">&lt;p&gt;Created page with &amp;quot;== Synopsys ARC-V ==   ARC-V Processor IP | Synopsys  https://www.synopsys.com/designware-ip/processor-solutions/arc-v-processors.html   Enhancing RISC-V Design w/ ARC Processor IP | Synopsys Blog  https://www.synopsys.com/blogs/chip-design/arc-processor-ip-risc-v.html   Synopsys Moves To RISC-V To Help SoC Developers  https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/  === Expansion or EOL ===  &amp;lt;blockquote&amp;gt; &amp;quot;A familiar fr...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== Synopsys ARC-V ==&lt;br /&gt;
&lt;br /&gt;
 ARC-V Processor IP | Synopsys&lt;br /&gt;
 https://www.synopsys.com/designware-ip/processor-solutions/arc-v-processors.html&lt;br /&gt;
&lt;br /&gt;
 Enhancing RISC-V Design w/ ARC Processor IP | Synopsys Blog&lt;br /&gt;
 https://www.synopsys.com/blogs/chip-design/arc-processor-ip-risc-v.html&lt;br /&gt;
&lt;br /&gt;
 Synopsys Moves To RISC-V To Help SoC Developers&lt;br /&gt;
 https://www.forbes.com/sites/karlfreund/2023/11/08/synopsys-moves-to-risc-v-to-help-soc-developers/&lt;br /&gt;
&lt;br /&gt;
=== Expansion or EOL ===&lt;br /&gt;
&lt;br /&gt;
&amp;lt;blockquote&amp;gt;&lt;br /&gt;
&amp;quot;A familiar friend is making a mark on the RISC-V landscape in a new and impactful way. Synopsys has expanded its ARC® processor IP portfolio with a new RISC-V-compatible family. While the next-generation Synopsys ARC-V™ processors mark our first foray into processor IP based on the open-standard RISC-V instruction set architecture (ISA), we’ve long played a key role in delivering configurable and extensible processor IP to SoC designers.&lt;br /&gt;
&lt;br /&gt;
Our existing ARC processors will continue to be in the mix as we roll out the new ARC-V ISA for future generations of our cores. The first of our ARC-V embedded cores, co-optimized with Synopsys.ai™ full-stack AI-driven EDA suite and our leading verification solutions, will be available during the second quarter of 2024. These processors are ideally suited for a variety of power-critical applications in automotive, storage, and artificial intelligence of things (AIoT) designs. Chip designers will gain a broader range of flexible, extensible processors from a provider with a decades-long track record for delivering and supporting PPA-efficient implementations and optimized software development tools and libraries.&lt;br /&gt;
&lt;br /&gt;
Synopsys has been a familiar presence in the RISC-V ecosystem for some time now as a member of RISC-V International, the global nonprofit that manages the standard. We recently joined the organization’s board of directors and its technical steering committee. Read on for more details about our new ARC-V processors, and how we can help chip designers optimize and differentiate their RISC-V processor-based SoCs for a wide range of applications.&amp;quot;&lt;br /&gt;
&amp;lt;/blockquote&amp;gt; &amp;lt;ref&amp;gt;https://www.synopsys.com/blogs/chip-design/arc-processor-ip-risc-v.html&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== keywords ==&lt;/div&gt;</summary>
		<author><name>Kenneth</name></author>
	</entry>
</feed>